Semiconductor devices are employed in many applications. An important type of semiconductor device used in storage devices is the dynamic random access memory (“DRAM”). For example, the DRAM is used extensively for storage in computers. A basic DRAM cell typically includes a capacitor and a transistor formed in a semiconductor substrate. The capacitor stores a charge representing a data value, and the transistor enables the data value to be refreshed, read from the capacitor, or written to the capacitor.
Reducing the surface area of the capacitor and/or the transistor, also known as the footprint, allows more DRAM cells to be fit onto a chip. The increased number of DRAM cells results in greater storage capacity for the chip.
A known method of minimizing the surface area of a DRAM cell or other memory cell is to arrange the components vertically such that the components are disposed along two or more layers. Vertical memory cells occupy less surface area than planar memory cells, wherein the transistor and capacitor are side by side, or diagonal memory cells, wherein the capacitor is formed in the trench and the transistor is adjacent to the surface of the trench. As a result, the vertical memory cells may be placed much closer together than planar or diagonal cells.
A known way to accomplish such vertical construction is to provide a deep trench formed in a semiconductor substrate. The capacitor and/or the transistor are formed along the walls of the trench. As an example of a deep trench fabrication process, a pad oxide layer and a pad nitride layer are first deposited atop a silicon substrate, and then a hard mask layer is deposited atop the nitride layer. The hard mask layer and the pad nitride layer are then patterned and etched using a lithographic step, and the hard mask layer is then used to mask the etching of a deep trench.
Next, the hard mask layer is removed, and a doped glass layer is deposited along the walls and bottom of the trench as well as atop the nitride layer. A further step is then carried out to pattern and remove the doped glass from atop the nitride layer and from the walls of the upper portion of the trench. An oxide cap is then deposited over the remaining portion of the doped glass, as well as over the walls of the rest of the trench and atop the nitride layer, and an anneal step is carried out to drive dopants from the doped glass into the silicon substrate and form a buried plate. The oxide cap and the doped glass are then removed, and a thin dielectric layer is deposited along the sides of the trench.
The lower portion of the trench is filled with polysilicon to form the node conductor. The top surface of the device is then planarized to remove any portion of the polysilicon that is atop the nitride layer, and the polysilicon is recessed to the intended depth of the collar. The dielectric film is removed from the exposed upper portion of the trench, and the trench collar oxide layer is then deposited and directionally etched back to remove any portion of the trench collar oxide layer that is atop the nitride layer and on top of the node polysilicon. The remainder of the polysilicon layer is next deposited, and the device is again planarized to remove any polysilicon that is atop the nitride layer. The nitride layer protects the surrounding silicon during the polysilicon etch step.
The trench collar oxide is then recessed back preferably using a wet etch step. The oxide recess forms a divot at a location where the collar oxide is removed below the level of polysilicon fill. The divot is then filled by again filling the trench with polysilicon and then recessing the polysilicon to a desired level. The polysilicon region is subsequently doped in high temperature processing steps by the prior deposited polysilicon, and the dopant subsequently out-diffuses into the substrate to form a buried strap region.
To further increase the integration density of a DRAM, the surface area or footprint of the vertical DRAM cell is reduced. However, the reduced surface area of the DRAM cell also reduces the inner surface area of the DRAM cell trench and thereby decreases the capacitance of the trench capacitor. Because the sidewalls of the trenches are generally planar and limit the surface area of the trench, a process known as “bottle etching” may be carried out to increase the surface area of the lower part of the trench. The bottle etching is typically carried out using a wet etch that etches the walls and bottom of the trench in an isotropic manner. As an example of a process for forming a bottle-etched trench, a deep trench is etched, in the manner described above. The lower part of the trench is then filled, such as with a resist material, and the trench collar oxide layer is then grown along the exposed upper portions of the walls of the trench. The material in the lower portion of the trench is then removed, and the now exposed walls of the lower portion of the trench and the bottom of the trench are then etched, such as with a wet etchant, that etches the exposed surfaces of the substrate along the lower portion of the walls and along the bottom of the trench but which does not etch the collar oxide. This etching widens and deepens the lower portion of the trench in an isotropic manner so that the rectangular shape of the trench is generally retained. The resulting structure of the trench, when viewed in cross-section, has a shape commonly referred to as a “bottle shape”. Examples of such bottle etching processes are described in U.S. Pat. No. 6,426,254 B2, issued Jul. 30, 2002 to Kudelka, et al. and titled “Method for Expanding Trenches by an Anisotropic Wet Etch”, the disclosure of which is incorporated herein by reference.
Though the known bottle etching process increases the inner surface area of the trench and thereby increases the capacitance of the trench capacitor, the attained increase in capacitance may not be sufficient as the integration density of the DRAM is further increased because the spacing between adjacent trenches and other structures is reduced and may prevent the trench from being sufficiently widened.
It is therefore desirable to provide a deep trench structure in which the surface area of the trench wall is further increased in a more efficient manner.